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| PH6325L N-channel TrenchMOSTM logic level FET M3D748 Rev. 01 -- 28 April 2004 Preliminary data 1. Product profile 1.1 Description Logic level N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOSTM technology. 1.2 Features s Optimized for use in DC-to-DC converters s Low threshold voltage s Very low switching and conduction losses s Low thermal resistance. 1.3 Applications s DC-to-DC converters s Voltage regulators s Switched-mode power supplies s Notebook computers. 1.4 Quick reference data s VDS 25 V s Qgd = 3.3 nC (typ) s RDSon 6.3 m (VGS = 10 V) s ID 78.7 A s Qg(tot) = 13.3 nC (typ) s RDSon 9.5 m (VGS = 4.5 V). 2. Pinning information Table 1: Pin 1,2,3 4 mb Pinning - SOT669 (LFPAK), simplified outline and symbol Description source (s) gate (g) mounting base; connected to drain (d) mb d Simplified outline Symbol g s MBB076 1 2 3 4 MBL286 Top view SOT669 (LFPAK) Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET 3. Ordering information Table 2: Ordering information Package Name PH6325L LFPAK Description Plastic single-ended surface mounting package; 4 leads Version SOT669 Type number 4. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage (DC) gate-source voltage drain current (DC) peak drain current total power dissipation storage temperature junction temperature source (diode forward) current (DC) Tmb = 25 C peak source (diode forward) current Tmb = 25 C; pulsed; tp 10 s unclamped inductive load; ID = 34 A; tp = 0.15 ms; VDD = 25 V; RGS = 50 ; VGS = 10 V; starting at Tj = 25 C unclamped inductive load; ID = 3.4 A; tp = 0.015 ms; VDD = 25 V; RGS = 50 ; VGS = 10 V; starting at Tj = 25 C [1] [2] Conditions 25 C Tj 150 C Tmb = 25 C; VGS = 10 V; Figure 2 and 3 Tmb = 100 C; VGS = 10 V; Figure 2 Tmb = 25 C; pulsed; tp 10 s; Figure 3 Tmb = 25 C; Figure 1 Min -55 -55 - Max 25 20 78.7 49.6 236 62.5 +150 +150 52 208 115 Unit V V A A A W C C A A mJ Source-drain diode Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy EDS(AL)R repetitive drain-source avalanche energy - 1.2 mJ [1] [2] Duty cycle is limited by the maximum junction temperature. Repetitive avalanche failure is not determined simply by thermal effects. Repetitive avalanche transients should only be applied for short bursts, not every switching cycle. 9397 750 12307 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data Rev. 01 -- 28 April 2004 2 of 13 Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET 120 Pder (%) 80 03aa15 120 Ider (%) 80 03aa23 40 40 0 0 50 100 150 200 Tmb (C) 0 0 50 100 150 200 Tmb (C) P tot P der = ---------------------- x 100% P tot ( 25 C ) ID I der = ------------------- x 100% I D ( 25 C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2. Normalized continuous drain current as a function of mounting base temperature. 103 003aaa559 ID (A) Limit RDSon = VDS / ID 102 tp = 10 s 100 s DC 10 1 ms 10 ms 100 ms 1 10-1 1 10 VDS (V) 102 Tmb = 25 C; IDM is single pulse; VGS = 10 V Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 9397 750 12307 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data Rev. 01 -- 28 April 2004 3 of 13 Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET 5. Thermal characteristics Table 4: Rth(j-mb) Thermal characteristics Conditions Min Typ Max 2 Unit K/W thermal resistance from junction to mounting base Figure 4 Symbol Parameter 5.1 Transient thermal impedance 10 003aaa560 Zth(j-mb) (K/W) = 0.5 1 0.2 0.1 0.05 10-1 0.02 single pulse P = tp T tp T 10-2 10-5 10-4 10-3 10-2 10-1 t tp (s) 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration. 9397 750 12307 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data Rev. 01 -- 28 April 2004 4 of 13 Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET 6. Characteristics Table 5: Characteristics Tj = 25 C unless otherwise specified. Symbol Parameter Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) gate-source threshold voltage ID = 250 A; VGS = 0 V ID = 1 mA; VDS = VGS; Figure 9 and 10 Tj = 25 C Tj = 150 C IDSS drain-source leakage current VDS = 25 V; VGS = 0 V Tj = 25 C Tj = 150 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 16 V; VDS = 0 V VGS = 4.5 V; ID = 25 A; Figure 7 and 8 Tj = 25 C Tj = 150 C VGS = 10 V; ID = 25 A; Figure 7 and 8 Tj = 25 C Tj = 150 C RG(int) Qg(tot) Qgs Qgs1 Qgs2 Qgd Vplat Qg(tot) Ciss Coss Crss Ciss td(on) tr td(off) tf VSD trr Qr internal gate resistance total gate charge gate-source charge pre-VGS(th) gate-source charge post-VGS(th) gate-source charge gate-drain (Miller) charge plateau voltage total gate charge input capacitance output capacitance reverse transfer capacitance input capacitance turn-on delay time rise time turn-off delay time fall time source-drain (diode forward) voltage reverse recovery time recovered charge IS = 25 A; VGS = 0 V; Figure 15 IS = 20 A; dIS/dt = -100 A/s; VGS = 0 V; VR = 25 V VGS = 0 V; VDS = 0 V; f = 1 MHz VDS = 12 V; ID = 25 A; VGS = 4.5 V; RG = 4.7 ID = 0 A; VDS = 0 V; VGS = 4.5 V VGS = 0 V; VDS = 12 V; f = 1 MHz; Figure 13 and 14 f = 1 MHz ID = 25 A; VDS = 12 V; VGS = 4.5 V; Figure 11 and 12 Dynamic characteristics 13.3 4.9 2.6 2.3 3.3 2.4 11.1 1871 517 179 2420 25 25 32 12 0.85 33 13 1.2 nC nC nC nC nC V nC pF pF pF pF ns ns ns ns V ns nC 4.7 7.5 1.8 6.3 10.1 m m 7.4 11.8 9.5 15.2 m m 0.06 10 1 500 100 A A nA 1 0.5 1.5 2 V V 25 V Conditions Min Typ Max Unit Source-drain diode 9397 750 12307 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data Rev. 01 -- 28 April 2004 5 of 13 Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET 40 ID (A) 10 V 4.5 V 2.7 V 003aaa561 VGS = 2.6 V 2.5 V 40 ID (A) 30 003aaa562 30 2.4 V 2.3 V 20 2.2 V 2.1 V 10 2V 1.8 V 1.6 V 0 0 0.5 1 1.5 VDS (V) 2 20 Tj = 150 C 25 C 10 0 0 1 2 VGS (V) 3 Tj = 25 C Tj = 25 C and 150 C; VDS > ID x RDSon Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values. 20 RDSon (m) 15 VGS = 2.4 V 2.5 V 003aaa563 2 a 1.5 03af18 2.6 V 2.7 V 10 3V 4.5 V 10 V 1 5 0.5 0 0 10 20 30 ID (A) 40 0 -60 0 60 120 Tj (C) 180 Tj = 25 C R DSon a = ---------------------------R DSon ( 25 C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. Fig 7. Drain-source on-state resistance as a function of drain current; typical values. 9397 750 12307 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data Rev. 01 -- 28 April 2004 6 of 13 Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET 2.5 VGS(th) (V) 2 max 03aa33 10-1 ID (A) 10-2 03aa36 1.5 typ 10-3 min typ max 1 min 10-4 0.5 10-5 0 -60 10-6 0 60 120 Tj (C) 180 0 1 2 VGS (V) 3 ID = 1 mA; VDS = VGS Tj = 25 C; VDS = 5 V Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage. 10 VGS (V) 8 003aaa566 003aaa508 VDS = 4.5 V 12 V 19 V VDS ID Vplat VGS(th) VGS 6 4 2 Qgs1 Qgs2 Qgd Qg(tot) Qgs 0 0 10 20 QG (nC) 30 ID = 25 A; VDS = 4.5 V, 12 V and 19 V Fig 11. Gate-source voltage as a function of gate charge; typical values. Fig 12. Gate charge waveform definitions. 9397 750 12307 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data Rev. 01 -- 28 April 2004 7 of 13 Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET 104 C (pF) 003aaa564 4000 C (pF) 3000 003aaa633 Ciss Crss Ciss 103 2000 Coss 1000 Crss 102 10-1 1 10 VDS (V) 102 0 0 2 4 6 8 10 VGS (V) VGS = 0 V; f = 1 MHz Tj = 25 C and 150 C; VDS = 0 V Fig 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. Fig 14. Input and reverse transfer capacitances as a function of gate-source voltage; typical values. 40 IS (A) 30 003aaa565 Tj = 150 C 20 25 C 10 0 0.2 0.4 0.6 0.8 VSD (V) 1 Tj = 25 C and 150 C; VGS = 0 V Fig 15. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. 9397 750 12307 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data Rev. 01 -- 28 April 2004 8 of 13 Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET 7. Package outline Plastic single-ended surface mounted package (Philips version LFPAK); 4 leads SOT669 E b2 L1 A c2 A2 C E1 b3 mounting base D1 H D b4 L2 1 e 2 3 b 1/2 4 X wM A c e A A1 C (A 3) detail X L yC 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A A1 A2 A3 b b2 b3 2.2 2.0 b4 0.9 0.7 c c2 D (1) D1(1) E(1) E1(1) max 5.0 4.8 3.3 3.1 e 1.27 H 6.2 5.8 L 0.85 0.40 L1 1.3 0.8 L2 1.3 0.8 w 0.25 y 0.1 8 0 1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62 0.25 0.30 4.10 4.20 0.19 0.24 3.80 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC MO-235 JEITA EUROPEAN PROJECTION ISSUE DATE 03-02-05 03-09-15 Fig 16. SOT669 (LFPAK). 9397 750 12307 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data Rev. 01 -- 28 April 2004 9 of 13 Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET 8. Soldering 5.70 4.70 4.60 3.70 2.50 2.00 0.90 (3x) 0.25 (2x) solder paste occupied area 0.075 solder lands solder resist 3.45 3.50 0.25 (2x) 0.60 (3x) 0.85 1.10 2.15 3.30 2.00 2.05 2.50 3.68 3.48 MSD864 1.27 3.81 0.70 (4x) 0.05 around (4x) Fig 17. SOT669 (LFPAK) optimized soldering footprint 9397 750 12307 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data Rev. 01 -- 28 April 2004 10 of 13 Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET 9. Revision history Table 6: Rev Date 01 20040428 Revision history CPCN Description Preliminary data (9397 750 12307) 9397 750 12307 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data Rev. 01 -- 28 April 2004 11 of 13 Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET 10. Data sheet status Level I II Data sheet status[1] Objective data Preliminary data Product status[2][3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). III Product data Production [1] [2] [3] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 11. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 13. Trademarks TrenchMOS -- is a trademark of Koninklijke Philips Electronics N.V. 12. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors Contact information For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. 9397 750 12307 Fax: +31 40 27 24825 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data Rev. 01 -- 28 April 2004 12 of 13 Philips Semiconductors PH6325L N-channel TrenchMOSTM logic level FET Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 5.1 6 7 8 9 10 11 12 13 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 (c) Koninklijke Philips Electronics N.V. 2004. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 28 April 2004 Document order number: 9397 750 12307 |
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